EDA tools implement a circuit design within an IC by performing a variety of operations on the circuit design. These operations are typically referred to as a “design flow.” In general, a design flow is organized into multiple phases such as synthesis, placement, and routing. The EDA tool ordinarily generates a comprehensive timing report at the conclusion of each phase.
In cases where the EDA tool is unable to close timing or complete the design flow for a given circuit design, designers rely upon the timing reports generated at the conclusion of each phase of the design flow for purposes of troubleshooting the circuit design. Though helpful, the timing reports are limited to showing the final results achieved by a given phase. Each phase of the design flow, however, is a significant undertaking involving many complex and/or iterative operations.